Now the application processing the reference element will have trouble deciding which uri child element to use. 现在,应用程序处理reference元素时会遇到困难,无法决定使用哪个uri子元素。
The main processing element is a fairly standard general-purpose processor. 主处理元素是一个非常标准的通用处理器。
The XSLT template for processing an element is very simple 处理元素的XSLT模板非常简单
To do so, it will pick off the first element of the list the head to do the processing on that element, and recursively pass the rest of the list to itself again. 为此,它将选取列表的第一个元素列表头部来对该元素执行处理,然后再递归式地将列表的其余部分传递给自身。
The XSLT templates that transform the and items into the formatting objects follow these rules when processing the element 将和项转换成格式化对象的XSLT模板在处理元素时遵循以下规则
A Visitor interface introduces the action protocol for processing an element of the collection. Visitor接口引入了处理集合元素的动作协议。
Bit slice central processing element 位片式中央处理单元
By using a single radix-16/ 8 butterfly processing element and reducing the number of multipliers, the proposed approach obtains significant hardware reduction. 采用单个基16/8复用的蝶形运算单元顺序处理,并通过减少乘法器数目,有效降低了硬件消耗;
A node ( a processing element) in the hidden layer of the network is an expansion term of the Laguerre polynomials. More or less terms determine the network learning speed and accuracy. 网络隐层节点(处理元)是Laguerre多项式展开项,展开项的多少决定着网络的学习速度和精度。
This article studies the high speed machining mechanism based on finite elements numerical simulation, by establishing geographic model of the work piece and the tool, transmitting it into DEFORM-3D and processing finite element analysis. 本文进行了基于有限元数值模拟的高速切削机理研究,通过建立毛坯和刀具几何模型,导入到DEFORM-3D中,对模型进行网格划分,设置主要计算条件,并进行了有限元计算分析。
This paper discusses the design of processing element s, proposes a flexible yet efficient architecture for processing element, and demonstrates its feasibility through FPGA prototyping. 该文讨论了网络处理器中处理单元设计需要考虑的因素,设计了一种较为灵活有效的处理单元架构,并进行了FPGA原型验证,证实了该结构的可行性。
Design the architecture of Reconfigurable Processing Element, which supports the implementation of RAC contexts. ·研究设计了支持配置指令执行的可重构处理元的结构。
The basic processing element ( PE) receives multiple inputs from other PEs and if the sum of the inputs is great enough, the PE fires and thus activates all the other PEs to which it connects. 基本处理元件(PE)接收来自其它元件的信号&多端输入.如果这些输入之和足够大,PE就被激发,并激励所有与之相联的其它元件。
For simplifying the design, the system is grouped into central processing element, information collect element, signal sended element, communication element, auxiliary element and TMR structure. 此外,为了设计方便,把通信系统分为:中央处理单元、信息采集单元、信号发送单元、通信单元、辅助单元和三模冗余结构等部分。
Furthermore, single butterfly processing element is employed to control FFT processor scale. 设计方案采用了单个蝶型运算单元以达到控制FFT处理器规模的目的。
Design and Implementation of Processing Element in Network Processor 网络处理器中处理单元的设计与实现
The response of T1 phase size to heattreatment processing and rare-earth element content are discussed. 根据T1相尺寸测定结果,分析了T1相尺寸与热处理工艺、稀土元素之间的关系。
A 1-D processing element ( PE) array is adopted to implement the search algorithm for finding the best-matched block. For variable block size, the sum of absolute difference ( SAD) is computed by reusing the results obtained from the computations of smaller sub-blocks. 架构中采用一维处理单元(PE)阵列来实现运动估计算法中匹配块的搜索,通过对较小子块的块间误差(SAD)的复用来计算不同大小块的块间误差。
The parallel processing of finite element structural analysis plays an important role in large-scale science and engineering computations. 有限元结构分析并行处理在大规模科学与工程计算中占有重要地位,本文简要介绍作者在这一领域内的研究工作及其成果。
An optimal allocation model of the sub processing element ( sub PE) level redundancy is developed by using the genetic algorithm. 利用最优化思想描述了子单元级冗余的最优分配模型,用遗传算法给出了全局最优解。
Reconfigurable processing element array is a key component in RCA. 可重构功能处理单元阵列是可重构计算体系的核心部件。
Progress in parallel processing in finite element structural analysis 结构有限元分析并行处理的研究进展
Array processor can be divided into two types, square array and linear array based on processing element ( PE) array interconnection structure. 阵列处理器根据运算单元阵列的互连结构,主要分成方形阵列和线性阵列两种。
There are local channels used by the processing element to inject/ eject messages to/ from the network, respectively. 这样本地的通道分别地被处理单元用于向网络中注入/推出消息。
Experiments show that the lookup capability of network processor can be effectively improved with only a small number of cache entries per processing element. ( 4) A register file and a novel memory hierarchy component, called Split Control Cache, are proposed for network processors. 实验表明,每个处理单元中只要维护少量的缓存表项,就可使网络处理器的查找能力获得有效的提升。(4)提出了一种网络处理器存储子系统中寄存器堆和cache机制的设计方法。
The processing element contains a processor and some local memory. 处理单元包括一个处理器和一些本地存储器。
A processing element array and an adder tree structure are used to improve the execution speed of SAD computation. The pipeline of the PE array and the adder tree is partitioned carefully in order to increase the work frequency. 本文结构由处理单元阵列和加法树组成核心计算结构,并对其流水线进行了细致地划分,提高了工作频率和运算速度。
In this system, the node consists of a processing element ( PE) and router. 在该系统中,节点包括一个处理单元(PE)和路由器。
Messages generated by the processing element are injected into the network through the injection channel. 所产生的消息被处理单元通过注入通道注入到网络中。
The main structure of the hardware including top timing control unit, bram and its timing generator, serial to parallel converter, shift register, multiplexer, processing element and multi-level adders. 硬件结构主要包括总体时序控制单元、存储单元及其时序发生器、串并转换单元、移位器、选通器、运算单元和级联加法器。